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A buck converter based on dual mode asynchronous pulse width modulator

机译:基于双模异步脉冲宽度调制器的降压转换器

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This paper presents a buck type DC-DC converter based on an asynchronous pulse width modulator (APWM). The proposed APWM is a self-oscillating circuitry which is composed of a binary comparator (BAPWM) and a distinctive digitally controlled delay cell. The oscillating frequency of the BAPWM can be tuned by the delay of the modulator loop. By increasing the delay of the modulator loop, the switching frequency decreases and the BAPWM can be reconfigured as a low frequency APWM (LFAPWM) modulator to meet the efficiency requirement at light loads. Also, to save the switching power consumption the high-side power switch size is scaled according to the load conditions. Since the carrier signal is internally generated by the APWM itself, there is no major concern about the ramp signal discontinuity which is make duty cycle disturbance. In addition to, from the point of view of the output spectrum, the proposed converter provides a better performance compared to the conventional PWM (CPWM) and PFM due to its noise shaping property. The proposed converter is designed and simulated in a 0.13-mu m CMOS technology to convert an input voltage of 5 V to the output voltage of 2.5 V with the maximum load current of 1 A The conversion efficiency with full loading range for the 2.5 V output voltage is higher than 85% whereas the peak efficiency is about 92%. (C) 2019 Elsevier GmbH. All rights reserved.
机译:本文介绍了基于异步脉冲宽度调制器(APWM)的降压型DC-DC转换器。所提出的APWM是一种自振荡电路,其由二进制比较器(BAPWM)和独特的数字控制的延迟单元组成。 BAPWM的振荡频率可以通过调制器循环的延迟来调谐。通过增加调制器回路的延迟,开关频率降低,并且BAPWM可以重新配置为低频APWM(LFAPWM)调制器,以满足光负载的效率要求。此外,为了节省开关功耗,根据负载条件缩放高侧电源开关尺寸。由于载波信号由APWM本身内部产生,因此对斜坡信号不连续性没有重大问题,这是制造占空比干扰的斜坡。除了从输出频谱的角度来看,所提出的转换器还通过其噪声整形特性而与传统的PWM(CPWM)和PFM相比提供了更好的性能。所提出的转换器设计和模拟在0.13 - MU M CMOS技术中,将5 V的输入电压转换为2.5V的输出电压,最大负载电流为1A的转换效率,具有2.5 V输出的完全加载范围电压高于85%,而峰值效率约为92%。 (c)2019年Elsevier GmbH。版权所有。

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