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OpenCL-based Virtual Prototyping and Simulation of Many-Accelerator Architectures

机译:基于OpenCL的虚拟原型和模拟许多加速器架构

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摘要

Heterogeneous architectures featuring multiple hardware accelerators have been proposed as a promising solution for meeting the ever-increasing performance and power requirements of embedded systems. However, the existence of numerous design parameters may result in different architectural schemes and thus in extra design effort. To address this issue, OpenCL-based frameworks have been recently utilized for FPGA programming, to enable the portability of a source code to multiple architectures. However, such OpenCL frameworks focus on RTL design, thus not enabling rapid prototyping and abstracted modeling of complex systems. Virtual Prototyping aims to overcome this problem by enabling the system modeling in higher abstraction levels. This article combines the benefits of OpenCL and Virtual Prototyping, by proposing an OpenCL-based prototyping framework for data-parallel many-accelerator systems, which (a) creates a SystemC Virtual Platform from OpenCL, (b) provides a co-simulation environment for the host and the Virtual Platform, (c) offers memory and interconnection models for parallel data processing, and (d) enables the system evaluation with alternative real number representations (e.g., fixed-point or 16 -bit floating-point).
机译:已经提出了具有多个硬件加速器的异构架构作为满足嵌入式系统的不断增长性能和功率要求的有希望的解决方案。然而,许多设计参数的存在可能导致不同的架构方案,从而导致额外的设计工作。为解决此问题,最近已用于FPGA编程的基于Opencl的框架,以使源代码的可移植性成为多个体系结构。但是,这种OpenCL框架专注于RTL设计,因此不启用复杂系统的快速原型和抽象的建模。虚拟原型设计旨在通过在更高的抽象级别中实现系统建模来克服此问题。本文结合了OpenCL和虚拟原型的优势,通过提出用于数据并行的多加速器系统的基于Opencl的原型框架,(a)从OpenCL创建系统C虚拟平台,(b)提供共模拟环境主机和虚拟平台(C)提供用于并行数据处理的存储器和互连模型,并且(D)使系统评估能够以替代的实数表示(例如,定点或16bit浮点)。

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