Simulation of current-voltage characteristics of a MOS structure considering the tunnel transport of carriers in semiconductor

摘要

The effect of a tunnel charge transport in the near-surface region of silicon on the electrical characteristics of MOS structures with a 2-3 nrn insulator layer is studied theoretically. An equilibrium condition for the substrate is assumed. The cases of an Al and polySi gate are considered. The possibility of a 'double' (in Si and through SiO2) tunnelling expands the energy range of transported particles, which increases one of the components of the total tunnel current. The proposed model allows for the improved simulation of gate current in MOSFETs, which is especially important for highly-doped substrates.