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首页> 外文期刊>Вестник Московского государственного технического университета. Серия приборостроение >Schemotechnics and peculiarities of realisation of a large optoelectronic neuro-coprocessor on the base of highly efficient vector-matrix multiplier
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Schemotechnics and peculiarities of realisation of a large optoelectronic neuro-coprocessor on the base of highly efficient vector-matrix multiplier

机译:基于高效矢量矩阵乘法器的大型光电神经协处理器的架构和实现的特殊性

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摘要

Principles and general peculiarities of schemotechnical realisation of optoelectronic neuro-coprocessor for PC providing emulation of one layer of arbitrary neural network (with the number of neurons up to 1000 under their full coherence), areconsidered and described within the framework of vector-matrix multiplying. Different modifications of the highly efficient vector-matrix multiplier realisation are proposed. Developed system is able to recognise reliably images with high noise levelwithin the period no more than three time constants of output photo-receiver.
机译:在矢量矩阵乘法的框架内考虑并描述了光电神经协处理器在PC上实现的原理和一般特性,该PC提供一层任意神经网络的仿真(在其全部相干状态下,神经元的数量可达1000个)。提出了高效矢量矩阵乘法器实现的不同修改。所开发的系统能够在不超过输出光接收器的三个时间常数的周期内可靠地识别具有高噪声水平的图像。

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