An error diagnosis technique for LUT-based FPGA designs combining pattern-based technique and BDD-based formal technique

摘要

This paper presents an approach to rectify multiple logic design errors in LUT-based FPGA designs. This approach, called EXL-algorithm, combines two kinds of techniques: a pattern-based technique for locating errors like in the EXM-algorithm, and a BDD-based formal technique to fix LUT function at each location. This combination allows the EXL-algorithm to rectify errors of LUT functions within practical processing time at 100% hit ratio.