Future perspective for the mainstream CMOS technology and their contribution to green technologies

摘要

Recently, CMOS technology has been recognized as an ultimate technology towards the limit of downscaling of electronic devices for logic circuits. In other words, CMOS will keep the position of mainstream device technology as the key components for logic integrated circuits almost for ever as long as the integrated circuits are necessary for our society, even after all the logic electronic devices reach their downsizing limits. It is expected that there are still several generations or 15 ～ 25 years until the CMOS device really reaches the downsizing limit caused by the direct-tunneling between the source and drain. In order to accomplish the downscaling of CMOS devices successfully, suppressing the SCE (Short Channel Effect) or suppressing the off-leakage current with keeping its high performance is the most important. There are two major solutions to suppress the SCE; One is pushing high-k gate insulator technologies to keep thinning the gate oxide, and the other is changing the transistor structure from the planar to the 3D multiple gate structures towards nanowire FETs. In this paper, future perspective for the mainstream CMOS technology is described from the view point of its downsizing. The downsizing of CMOS devices is still the very effective way to increase the performance and to decrease the power consumption of integrated circuits, and the progress of CMOS device technology will contribute to the 'green technologies' by increasing the efficiency of the operation of every system controlled by microprocessors.