Design of an Extremely Energy-Efficient Hardware Algorithm Using Adiabatic Superconductor Logic and Its Digital Modeling Approach

摘要

We designed and implemented an extremely energy-efficient hardware algorithm using adiabatic quantum-flux-parametron (AQFP) logic based on a hardware-algorithm known as the Collatz conjecture. The circuit is composed of mergers, odd-even check stages, path controllers, processing units, terminating stages, together with a feedback loop. This design is at least 3 orders of magnitude better in energy efficiency compared to rapid-single-flux-quantum (RSFQ) designs and is superior to semiconductor-based designs even when including the power dissipation of a cryocooler. Furthermore, we also proposed an HDL-based approach for large-scaled AQFP circuit design, since there is no such digital simulation environment up to date.