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首页> 外文期刊>Journal of optoelectronics and advanced materials >Fixed oxide charge, interface traps and border traps in MOS structures, grown on plasma hydrogenated (100)-psi
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Fixed oxide charge, interface traps and border traps in MOS structures, grown on plasma hydrogenated (100)-psi

机译:在等离子氢化(100)-psi上生长的MOS结构中的固定氧化物电荷,界面陷阱和边界陷阱

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The subject of the present study is the interface region of MOS structures with oxides grown on (100)-pSi hydrogenated wafers. The hydrogenation was accomplished in an RF plasma, the Si substrates being either unheated or kept at 300 degrees C. The oxides were thermally grown in dry O-2 at 850 degrees C. Information was gained on the concentration of charged defects and their location in the Si/oxide interface region, from examination of the capacitance-voltage (C-V) frequency behaviour. A comparative analysis was performed on the electrically active defects for the structures, with different hydrogenation conditions. The concentrations of border traps were determined by analysis of the hysteresis of the C-V curves. The interface trap density profiles over the Si bandgap were investigated by a standard high frequency method from the 300 kHz C-V characteristics of the MOS structures. The intrinsic fixed oxide charges were determined from the transition frequencies of the interface trap response separating low from high frequencies for the different samples. The concentration and nature of the defects were found to depend on the substrate temperature during plasma exposure. In oxides on unheated Si, negatively charged oxide defects were found.
机译:本研究的主题是MOS结构与(100)-pSi氢化晶片上生长的氧化物的界面区域。氢化是在RF等离子体中完成的,Si衬底未加热或保持在300摄氏度。氧化物在干燥的O-2中于850摄氏度热生长。获得了带电缺陷浓度及其在硅中的位置的信息。通过检查电容-电压(CV)频率行为,确定Si /氧化物界面区域。对具有不同氢化条件的结构的电活性缺陷进行了比较分析。通过分析C-V曲线的磁滞来确定边界陷阱的浓度。通过标准的高频方法,根据MOS结构的300 kHz C-V特性,研究了Si带隙上的界面陷阱密度分布。根据不同样品的界面陷阱响应的跃迁频率确定了固有的固定氧化物电荷。发现缺陷的浓度和性质取决于等离子体暴露期间的基板温度。在未加热的硅上的氧化物中,发现带负电的氧化物缺陷。

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