Analysis of I-ON and Ambipolar Current for Dual-Material Gate-Drain Overlapped DG-TFET

摘要

Dual Metal (DM) work function gate overlapped on drain with high-k dielectric and low-k dielectric Double Gate (DG)-Tunnel Field Effect Transistor (TFET) has been proposed for getting high ON current as well as reduced ambipolar current. This device structure has high-k (HfO2) gate dielectric which deposits on the channel region and low-k (SiO2) dielectric deposits over the source and the drain side region. The high-k dielectric at the channel region enhances the ON current and low-k dielectric of DMDG-TFET gives higher I-ON/I-OFF ratio, low off current and steep subthreshold slope than conventional DMDG-TFET. The gate-drain overlap has shown low ambipolar current as compared to the gate electrode aligned with channel-drain junction. The gate on drain overlap limits the electric field in the ambipolar condition and depletes carrier on the drain side away from the junction. This results in decreased tunnelling injection or probability. The optimized DMDG-TFET with hetero-dielectric shows higher ON-current than SiO2-only DMDG-TFET leading to a 3 orders of magnitude and getting steep average subthreshold slope of 23 mV/decade. The ambipolar current reduces 8 orders of magnitude for the 30 nm gate on drain overlapped DMDG-TFET device by choosing appropriate dual metal workfunction 4.3 eV (T-gate) and 4.1 eV (S-gate).