Analysis of Leakage Power Reduction in Dual-V{sub}(th) Technologies in the Presence of Large Threshold Voltage Variation

摘要

Low-power circuits are especially sensitive to the increasing levels of process variability and uncertainty. In this paper we study the problem of leakage power minimization through dual V{sub}(th) design techniques in the presence of significant V{sub}(th) variation. For the first time we consider the optimal selection of V{sub}(th) under a statistical model of threshold variation taking into account die-to-die and within-die variability. Probabilistic analytical models are introduced to account for the impact of V{sub}(th) uncertainty on leakage power and timing slack. From this analysis we find that the dual V{sub}(th) technique is significantly less effective in reducing power in the presence of variability. We also show that in the presence of variability the optimal value of the second V{sub}(th) is typically higher compared to that of the variation-free scenario. The model provides a way to compute the optimal value of the second threshold voltage for a variety of process conditions.