首页> 外文期刊>Journal of Low Power Electronics >Co-Exploration of Unit-Time Leakage Power and Latency Spaces for Leakage Energy Minimization in High-Level Synthesis
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Co-Exploration of Unit-Time Leakage Power and Latency Spaces for Leakage Energy Minimization in High-Level Synthesis

机译:共同探索单位时间泄漏功率和延迟空间,以在高级综合中最小化泄漏能量

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摘要

In this paper, we propose a latency-constrained scheduling algorithm that minimizes the leakage energy of high-level synthesis designs per computation performed (total leakage energy), by co-exploring unit-time leakage power (leakage energy per control step) and latency spaces in order to minimize their product while satisfying a latency constraint. Our exploration of the dimension of latency (within an upper-bound constraint) is orthogonal to other low-power approaches like multi-V_(dd) and multi-V_(th) assignments (module selection) of functional units, dynamic power optimization via switching probability reduction, and clock/power gating. It can thus be combined with any or a combination of these techniques to yield lower computation leakage energy than the combination of the corresponding techniques alone. We use the basic premise of the well-known force-directed scheduling (FDS) algorithm of a distribution graph of probabilistic operation scheduling that we view as global probability map of all scheduling possibilities and their probabilistic effects on the metric of interest (number of functional units in FDS, and leakage power in our case) in our algorithm. However, we extend FDS significantly by replacing the uniform scheduling probabilities and force formulation of FDS by: (a) an initial probabilistic distribution graph of the number of functional units used in each control step based on a first-pass non-uniform probability driven randomized scheduling that yields the final starting probabilities that are conducive to leakage energy minimization; (b) a root-mean-square based estimation of the maximum functional unit usage distributed across control steps that contributes to minimizing either the overall unit-time leakage power or total leakage energy; and (c) a fast greedy noncommittal scheduling algorithm for the purpose of estimating the latency for scheduling output operations in order to minimize the product of estimated unit-time leakage power and estimated latency. Experimental results on 11 media benchmarks demonstrate a total leakage energy reduction of up to 64% and an average of 44% compared to conventional FDS with a power-driven modification that only minimizes unit-time leakage power (which is also what other low-power approaches do), and a total leakage energy reduction of up to 39% and an average of 12% compared to a version of our algorithm that has the aforementioned augmentations (a) and (b), but does not explore the latency space for total leakage energy minimization. This demonstrates the efficacy of co-exploring unit-time leakage power and latency spaces for leakage energy minimization.
机译:在本文中,我们提出了一种受延迟限制的调度算法,该算法通过共同探索单位时间的泄漏功率(每个控制步骤的泄漏能量)和延迟来最大程度地减少每次执行的高级综合设计的泄漏能量(总泄漏能量)空间以最小化其乘积,同时满足延迟限制。我们对延迟时间范围(上限约束内)的探索与其他低功耗方法(例如功能单元的多V_(dd)和多V_(th)分配(模块选择),通过降低切换概率,以及时钟/电源门控。因此,可以将其与这些技术中的任何一种或组合相结合,以产生比单独的相应技术的组合低的计算泄漏能量。我们使用概率操作调度的分布图的众所周知的强制调度(FDS)算法的基本前提,我们将其视为所有调度可能性及其对目标度量(函数数量的概率影响)的全局概率图FDS中的单位,以及本例中的泄漏功率)。但是,我们通过以下方式代替FDS的统一调度概率并强制制定FDS,从而显着扩展FDS:(a)基于首过非均匀概率驱动随机化的每个控制步骤中使用的功能单元数量的初始概率分布图产生最终启动概率的计划,有助于降低泄漏能量; (b)在控制步骤之间分配的最大功能单元使用量的基于均方根的估计,有助于最大程度地减少单位时间的总泄漏功率或总泄漏能量; (c)一种快速贪婪的非承诺调度算法,其目的是估计用于调度输出操作的等待时间,以便最小化估计的单位时间泄漏功率和估计的等待时间的乘积。在11个媒体基准上的实验结果表明,与传统的FDS相比,功率驱动的修改仅使单位时间的泄漏功率最小(这也是其他低功耗功率的总和),与之相比,总泄漏能量最多可降低64%,平均降低44%。的方法),与我们具有上述增强(a)和(b)的算法版本相比,总泄漏能量减少了39%,平均减少了12%,但并未探索总延迟时间泄漏能量最小化。这证明了共同探索单位时间泄漏功率和等待时间空间对于最小化泄漏能量的功效。

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