Readout electronics upgrade on ALICE/PHOS detector for Run 2 of LHC

摘要

The ALICE/PHOS detector is carrying out a major upgrade of its readout electronics for the RUN 2 of LHC (2015-2017). A new architecture based on the point to point link is developed. The event readout rate can achieve 30 kHz by replacing the old parallel GTL bus with DTC links. The communication stability of the interface between front-end electronic boards and readout concentrators is significantly improved. A new FPGA firmware is designed to be compatible with the upgraded ALICE trigger system and DATE software.