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Critical Thickness Threshold in Hf02 layers

机译:Hf02层中的临界厚度阈值

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摘要

Wet etch ability of H102 high k layers in diluted HF solutions is very attractive to achieve anefficient selective removal with respect to silicon consumption and metal gate compatibility foradvanced technology node. Unfortunately in most cases Hf02 layers can not be etched in a wetmixture after the gate stack formation and dry etch. This behavior is now clearly correlated to themonoclinic crystalline phase [1;2]. This phase can be either an "as deposited" state in the case ofhigh temperature deposition mode such as MOCVD, or a post integration state related to addedthermal budget as for ALCVD. In this study, the Hf02 etch rate with a diluted HF/HCI chemicalsolution was tightly monitored as a function of both ALCVD and MOCVD deposition modes, underdifferent annealing conditions and different deposited thicknesses.
机译:在先进的技术节点上,H102高k层在稀释的HF解决方案中的湿法蚀刻能力对于实现有效的选择性去除而言非常有吸引力,因为硅消耗量和金属栅极兼容性都很高。不幸的是,在大多数情况下,在形成栅叠层和干法刻蚀后,不能在湿混合物中刻蚀HfO2层。现在,这种行为显然与单斜晶相[1; 2]相关。在诸如MOCVD的高温沉积模式的情况下,该阶段可以是“沉积状态”,或者对于ALCVD,该阶段可以是与附加热预算有关的后集成状态。在这项研究中,用ALCVD和MOCVD沉积模式,不同的退火条件和不同的沉积厚度来严格监控用稀释的HF / HCl化学溶液对HfO2的腐蚀速率。

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