Effects of Oxidation and Annealing Temperature on Grain Boundary Properties in Polycrystalline Silicon Probed Using Nanometre-Scale Point-Contact Devices

摘要

We discuss a method to fabricate single-electron transistors targeted at high-temperature operation. Natural nanostructure in polycrystalline silicon was utilised for charging islands and its grain boundaries were modified by a multi-step annealing technique to form grain-boundary tunnelling barriers. The effects of oxidation and annealing temperature on individual grain boundary properties were investigated using point-contact devices. It is found that low temperature oxidation selectively oxidises the grain boundaries but does not affect carrier transport significantly. Subsequent annealing increases the grain-boundary tunnelling barrier height and resistance. In addition, their distribution is narrowed by optimizing the annealing condition.