Deep Traps in AlGaN/GaN Heterostructure Field-Effect Transistors Studied by Current-Mode Deep-Level Transient Spectroscopy: Influence of Device Location

摘要

Across-wafer variation of deep traps in AlGaN/GaN heterostructure field-effect transistors (HFETs) has been studied using current-mode deep-level transient spectroscopy (I-DLTS). It is found that applying a bias to the gate corresponding to open-channel or nearly pinched-off operation while cooling from 550 K has significant effects on the threshold voltage of the device and spectral features of I-DLTS at T < approx400 K. To compare I-DLTS spectra acquired under different measurement conditions (e.g., different filling pulse heights or widths), attention should be paid to the gate bias applied while cooling. We find that the spectral features observed across the wafer can be divided into three categories: (i) a dominant trap A_(1) at approx360 K; (ii) a prominent hole-like trap H_(1) at approx480 K; and (iii) for T < 340 K, several traps varying in magnitude, including A, B, and C_(1), and a hole-like trap H_(0). Based on I-DLTS, measured as a function of filling pulse height and filling pulse width, we suggest that: (i) trap A_(1), with E_(T) velence 1.1 eV to 1.2 eV and sigma velence 4 X 10~(-13) cm~(2) to 2 X 10~(-12) cm~(2), is associated with extended defects, such as threading dislocations; (ii) traps A, B, and C_(1), located mainly in the two-dimensional electron gas (2DEG) channel region, could be related to point defects; and (iii) the hole-like trap H_(1), with E_(T) velence 1.2 eV to 1.3 eV and sigma velence 8 X 10~(-17) cm~(2) to 5 X 10~(-15) cm~(2), may be related to surface states. Note that traps A (approx0.67 eV), B (0.58 eV to 0.61 eV), and C_(1) (0.44 eV to 0.49 eV) are commonly observed in GaN layers grown by various techniques. For all of the HFETs near the center of the wafer, trap A_(1) dominates the DLTS spectra, whereas trap B becomes prominent for some of the HFETs near the edge of the wafer.