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Analytical Modeling of Potential Distribution and Threshold Voltage of Gate Underlap DG MOSFETs with a Source/Drain Lateral Gaussian Doping Profile

机译:具有源极/漏极横向高斯掺杂分布的栅极下叠式DG MOSFET的电势分布和阈值电压的分析模型

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摘要

This paper reports a new two-dimensional (2D) analytical model for the potential distribution and threshold voltage of the short-channel symmetric gate underlap ultrathin DG MOSFETs with a lateral Gaussian doping profile in the source (S)/drain (D) region. The parabolic approximation and conformal mapping techniques have been explored for solving the 2D Poisson's equation to obtain the channel potential function of the device. The effects of straggle parameter (of the lateral Gaussian doping profile in the S/D region), underlap length, gate length, channel thickness and oxide thickness on the surface potential and threshold voltage have been investigated. The loss of switching speed due to the drain-induced barrier lowering (DIBL) has also been reported. The proposed model results have been validated by comparing them with their corresponding TCAD simulation data obtained by using the commercially available 2D ATLAS (TM) simulation software.
机译:本文报告了一种新的二维(2D)分析模型,用于在源极(S)/漏极(D)区域中具有横向高斯掺杂分布的短沟道对称栅下叠超薄DG MOSFET的电势分布和阈值电压。已经探索了抛物线逼近和共形映射技术来求解二维泊松方程以获得设备的沟道电势函数。研究了散布参数(在S / D区域中的横向高斯掺杂分布),重叠长度,栅极长度,沟道厚度和氧化物厚度对表面电势和阈值电压的影响。也已经报道了由于漏极引起的势垒降低(DIBL)而导致的开关速度损失。拟议的模型结果已通过与使用商用2D ATLAS(TM)仿真软件获得的相应TCAD仿真数据进行比较而得到验证。

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