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A Methodology for Handling Complex Functional Constraints for Large Industrial Designs

机译:处理大型工业设计的复杂功能约束的方法论

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Functional constraints capture Boolean relationships among signal nets by analyzing the functionality of a circuit. Such constraints find widespread application in VLSI design methodology and can be derived using various techniques. The size and complexity of these constraints becomes a limiting factor in their successful usage for large designs. This paper describes CONAN (Constraint Analyzer), a powerful framework to analyze and simplify such constraints. CONAN is built on the solution to a novel minimization problem. The feasibility and effectiveness of CONAN is demonstrated by using it for functional untestability analysis of large industrial benchmarks. Runtimes were reduced from over a week to less than 30 minutes. Additionally, unique functionally untestable faults were derived using this approach when compared with constraints provided by designers.
机译:功能约束通过分析电路的功能来捕获信号网络之间的布尔关系。这样的约束条件在VLSI设计方法学中得到了广泛的应用,并且可以使用各种技术来推导。这些约束的大小和复杂性成为它们成功用于大型设计的限制因素。本文介绍了CONAN(约束分析器),它是分析和简化此类约束的强大框架。 CONAN建立在解决新型最小化问题的解决方案上。通过将其用于大型工业基准的功能不可测试性分析,证明了CONAN的可行性和有效性。运行时间从一周以上减少到不到30分钟。此外,与设计人员提供的约束条件相比,使用这种方法可以得出独特的无法测试的故障。

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