Design of a 10Gbps Analog Adaptive Equalizer and a Pre-Emphasis Filter for 34-inch Backplane Channel

摘要

The serial interface through a backplane channel suffers from severe signal integrity problem caused by channel imperfections such as flat loss, frequency dependent loss, reflection, and so on. The frequency dependent loss is the major cause of ISI (Inter-Symbol Interference). For reducing ISI, a pre-emphasis filter or an adaptive equalizer has been used in many products to overcome the ISI. This paper presents the comparison between these two approaches. Prototype pre-emphasis filter and analog adaptive equalizer are designed with a 0.18-μm CMOS process for 10G-bps data transmission through a 34-inch FR-4 PCB trace. The simulation and layout results demonstrate 10ps peak-to-peak jitter and 2.24mm{sup}2 for the pre-emphasis filter and 8ps peak-to-peak jitter and 0.56mm{sup}2 for the adaptive equalizer.