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Application Space Exploration of a Heterogeneous Run-Time Configurable Digital Signal Processor

机译:异构运行时可配置数字信号处理器的应用空间探索

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This paper describes the application space exploration of a heterogeneous digital signal processor with dynamic reconfiguration capabilities. The device is built around three reconfigurable engines featuring different flavours and computation granularities that make it suitable for a wide range of signal processing application domains such as video coding, image processing, telecommunications, and cryptography. Performance of signal processing applications is evaluated from measurements performed on a CMOS 90 nm prototype. In order to characterize the application space of the processor, performance is compared with state-of-the-art devices, taking programmability, computational capabilities, and energy efficiency as the main metrics. The device exploits performance and energy efficiency significantly more than general purpose processors, while still maintaining a user-friendly programming approach that mainly relies on software-oriented languages. The device is able to achieve 1.2 to 15 GOPS with an energy efficiency from 2 to 50 GOPS/W when running the selected applications.
机译:本文描述了具有动态重配置功能的异构数字信号处理器的应用空间探索。该设备围绕三个可重配置的引擎构建,这些引擎具有不同的风格和计算粒度,使其适用于广泛的信号处理应用领域,例如视频编码,图像处理,电信和密码学。通过在CMOS 90 nm原型上执行的测量来评估信号处理应用程序的性能。为了表征处理器的应用空间,将性能与最新设备进行了比较,并以可编程性,计算能力和能源效率为主要指标。与通用处理器相比,该设备在性能和能效上的利用率大大提高,同时仍保持了一种用户友好的编程方法,该方法主要依赖于面向软件的语言。在运行选定的应用程序时,该设备能够达到1.2至15 GOPS,能效为2至50 GOPS / W。

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