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首页> 外文期刊>Very Large Scale Integration (VLSI) Systems, IEEE Transactions on >FPGA Implementation of Orthogonal Matching Pursuit for Compressive Sensing Reconstruction
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FPGA Implementation of Orthogonal Matching Pursuit for Compressive Sensing Reconstruction

机译:正交匹配追踪压缩感知重构的FPGA实现

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摘要

In this paper, we present a novel architecture based on field-programmable gate arrays (FPGAs) for the reconstruction of compressively sensed signal using the orthogonal matching pursuit (OMP) algorithm. We have analyzed the computational complexities and data dependence between different stages of OMP algorithm to design its architecture that provides higher throughput with less area consumption. Since the solution of least square problem involves a large part of the overall computation time, we have suggested a parallel low-complexity architecture for the solution of the linear system. We have further modeled the proposed design using Simulink and carried out the implementation on FPGA using Xilinx system generator tool. We have presented here a methodology to optimize both area and execution time in Simulink environment. The execution time of the proposed design is reduced by maximizing parallelism by appropriate level of unfolding, while the FPGA resources are reduced by sharing the hardware for matrix–vector multiplication across the data-dependent sections of the algorithm. The hardware implementation on the Virtex6 FPGA provides significantly superior performance in terms of resource utilization measured in the number of occupied slices, and maximum usable frequency compared with the existing implementations. Compared with the existing similar design, the proposed structure involves 328 more DSP48s, but it involves less slices and 1.85 times less computation time for signal reconstruction with , , and , where is the number of samples, is the size of the measurement vector, and is the sparsity. It also provides a higher peak signal-to-noise ratio value of 38.9 dB with a reconstruction time of s, which is twice faster than the existing design. In addition, we have presented a performance metric to implement the OMP algorithm in resource constrained FPGA for the better quality of signal reconstruction.
机译:在本文中,我们提出了一种基于现场可编程门阵列(FPGA)的新颖架构,用于使用正交匹配追踪(OMP)算法重建压缩感测信号。我们分析了OMP算法不同阶段之间的计算复杂性和数据依赖性,以设计其体系结构,以提供更高的吞吐量和更少的面积消耗。由于最小二乘问题的解决方案占用了整个计算时间的很大一部分,因此我们为线性系统的解决方案提出了一种并行的低复杂度体系结构。我们进一步使用Simulink对拟议的设计进行了建模,并使用Xilinx系统生成器工具在FPGA上进行了实现。我们在这里介绍了一种在Simulink环境中优化区域和执行时间的方法。通过在适当的展开级别上最大化并行度,可以减少所提出设计的执行时间,同时通过在算法的数据相关部分之间共享矩阵-矢量乘法的硬件,可以减少FPGA资源。在Virtex6 FPGA上的硬件实现与现有实现相比,在以占用的条带数量衡量的资源利用率和最大可用频率方面提供了显着优越的性能。与现有的类似设计相比,所提出的结构涉及328个以上的DSP48,但是通过,,和,信号重构所需的切片更少,计算时间却少1.85倍,其中,是样本数,是测量矢量的大小,并且是稀疏的。它还提供了38.9 dB的更高峰值信噪比值,重建时间为s,这比现有设计快两倍。此外,我们提出了一种性能指标,用于在资源受限的FPGA中实现OMP算法,以提高信号重建的质量。

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