A Method for Improving Power Grid Resilience to Electromigration-Caused via Failures

摘要

Electromigration (EM) has become a major power grid reliability problem in VLSI. In this paper, we first demonstrate that EM reliability analysis of a power grid can be converted to analyzing EM reliability of the grid vias. We develop a model for calculating EM lifetime of via-arrays and observe that making power grid EM-immortal carries a huge metal area overhead and possibly makes routing of both power and signal networks too difficult to complete. We propose a method for trading off power grid integrity and reliability to minimize the total metal area overhead needed to achieve the desired grid life time under power integrity constraints. Experimental results show that using our method, both EM reliability and power integrity can be met, while the additional metal area used is significantly reduced.