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Securing the PRESENT Block Cipher Against Combined Side-Channel Analysis and Fault Attacks

机译:确保PRESENT分组密码器免受组合的边信道分析和故障攻击

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In this paper, we present and evaluate a hardware implementation of the PRESENT block cipher secured against both side-channel analysis and fault attacks (FAs). The side-channel security is provided by the first-order threshold implementation masking scheme of the serialized PRESENT proposed by Poschmann et al. For the FA resistance, we employ the Private Circuits II countermeasure presented by Ishai et al. at Eurocrypt 2006, which we tailor to resist arbitrary 1-bit faults. We perform a side-channel evaluation using the state-of-the-art leakage detection tests, quantify the resource overhead of the Private Circuits II countermeasure, subdue the implementation to established differential FAs against the PRESENT block cipher, and contemplate on the structural resistance of the countermeasure. This paper provides the detailed instructions on how to successfully achieve a secure Private Circuits II implementation for the data path as well as the control logic.
机译:在本文中,我们介绍并评估了PRESENT分组密码的硬件实现,该硬件实现了针对边信道分析和故障攻击(FA)的保护。旁信道安全性由Poschmann等人提出的序列化PRESENT的一阶阈值实现屏蔽方案提供。对于FA抗性,我们采用Ishai等人提出的Private Circuits II对策。在Eurocrypt 2006上,我们量身定制了它以抵抗任意的1位错误。我们使用最新的泄漏检测测试执行边信道评估,量化专用电路II对策的资源开销,针对PRESENT分组密码实施已建立的差分FA,并考虑结构阻力对策。本文提供了有关如何成功实现数据路径以及控制逻辑的安全专用电路II实现的详细说明。

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