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Mitigating Stuck Cell Failures in MLC NAND Flash Memory via Inferred Erasure Decoding

机译:通过推断的擦除解码缓解MLC NAND闪存中的卡滞单元故障

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The multilevel-cell NAND flash memory experiences permanent hard errors due to cell defects (stuck cells). To overcome this problem, stuck cells are either regarded as erasures by the decoder based upon the knowledge of stuck cell location, or the entire memory block containing the stuck cells is marked as bad block and made unavailable for future usage. In this paper, a multiround inferred stuck-cell erasure belief-propagation (BP) decoding (ISED) is proposed in which the stuck cell locations are assumed to be unknown to the decoder. To perform the inferred erasure decoding, the input channel log-likelihood ratio (LLR) information is attenuated before BP decoding by modifying the threshold voltage distribution functions. In case of decoding failure, the probable stuck cell locations are inferred by using the flash's read-back voltage signal and the decoded code-word bits. For all such inferred stuck cells, the input LLRs are set to zero for subsequent rounds of BP decoding. As the likely incorrect LLRs corresponding to the stuck cells are erased, the performance of BP decoder is substantially improved. Simulation results show that the error-rate performance is improved by more than two orders of magnitude with a moderate increase in decoding complexity under the proposed ISED scheme.
机译:由于单元缺陷(卡住的单元),多级单元NAND闪存会遇到永久性的硬错误。为了克服这个问题,解码器基于对粘附单元位置的了解,将粘附单元视为擦除,或者将包含粘附单元的整个存储块标记为坏块,以备将来使用。本文提出了一种多轮推断卡式信元擦除置信度传播(ISED)解码(ISED),其中假定卡式信元的位置对于解码器是未知的。为了执行推断的擦除解码,通过修改阈值电压分布函数,在BP解码之前衰减输入通道对数似然比(LLR)信息。在解码失败的情况下,可通过使用闪存的回读电压信号和解码后的代码字位来推断可能的卡住单元位置。对于所有此类推断的滞留单元,将输入LLR设置为零,以用于后续轮次BP解码。随着与卡住的单元相对应的可能不正确的LLR被擦除,BP解码器的性能得到了显着改善。仿真结果表明,在所提出的ISED方案下,误码率性能提高了两个数量级以上,并且解码复杂度适度增加。

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