首页> 外文期刊>IEEE transactions on very large scale integration (VLSI) systems >Interpage-Based Endurance-Enhancing Lower State Encoding for MLC and TLC Flash Memory Storages
【24h】

Interpage-Based Endurance-Enhancing Lower State Encoding for MLC and TLC Flash Memory Storages

机译:MLC和TLC闪存存储的基于页面间的持久性增强低状态编码

获取原文
获取原文并翻译 | 示例

摘要

During the past decade, the endurance of NAND flash memory has severely deteriorated. The maximum number of program and erase cycles has fallen significantly with emerging of multilevel cell (MLC) and triple-level cell (TLC) technology, and scaling down o
机译:在过去的十年中,NAND闪存的耐用性已严重恶化。随着多层单元(MLC)和三层单元(TLC)技术的出现,编程和擦除周期的最大数目已显着下降,并且按比例缩小

著录项

相似文献

  • 外文文献
  • 中文文献
  • 专利
获取原文

客服邮箱:kefu@zhangqiaokeyan.com

京公网安备:11010802029741号 ICP备案号:京ICP备15016152号-6 六维联合信息科技 (北京) 有限公司©版权所有
  • 客服微信

  • 服务号