A 455-Mb/s MR preamplifier design in a 0.8-Μm CMOS process

摘要

In this paper, we present a CMOS preamplifier for use withnmagnetoresistive (MR) read elements in disk drives. The performance ofnthe CMOS design is competitive with the more expensive currentngeneration of BiCMOS MR preamplifiers. The measured gain for thenpreamplifier is 43 dB and the measured 3-dB bandwidth is greater thann273 MHz corresponding to a 455-Mb/s data rate. Likewise, the measuredninput-referred voltage noise is less than 0.57 nV/√Hz, andnmeasured input-referred current noise is less than 10.54 pA/√Hz atnan MR bias current of 10 mA, The preamplifier has been implemented in an0.8-Μm 5 V CMOS process and occupies a die area of 1.78×1.78 mmn2 In this paper, we introduce a new scheme to reduce currentnnoise below that contributed by a single MOS device, This technique hasnthe potential for even more impact for future submicron processes. Wenalso showed that voltage amplifiers offer lower noise thanntransimpedance amplifiers for similar gain and bandwidth constraints