NV-SRAM: a nonvolatile SRAM with backup ferroelectric capacitors

摘要

This paper demonstrates new circuit technologies that enable an0.25-Μm ASIC SRAM macro to be nonvolatile with only a 17% cell-areanoverhead. New capacitor-on-metal/via-stacked-plug process technologiesnpermit a nonvolatile SRAM (NV-SRAM) cell to consist of a six-transistornASIC SRAM cell and two backup ferroelectric capacitors stacked over thenSRAM portion. READ and WRITE operations in this NV-SRAM cell are verynsimilar to those of a standard SRAM, and this NV-SRAM shares almost allnthe circuit properties of a standard SRAM. Because each memory cell cannperform STORE and RECALL individually, both can execute massive-parallelnoperations. A Vdd/2 plate-line architecture makes READ/WRITEnfatigue negligible. A 512-byte test chip was successfully fabricated tonshow compatibility with ASIC technologies