A 1-V 10-MHz clock-rate 13-bit CMOS ΔΣ modulator usingunity-gain-reset op amps

摘要

The problem of low-voltage operation of switched-capacitorncircuits is discussed, and several solutions based on usingnunity-gain-reset of the opamps are proposed. Due to the feedbacknstructure, the opamps do not need to be switched off during the resetnphase of the operation, and hence can be clocked at a high rate. Anlow-voltage ΔΣ modulator, incorporating pseudodifferentialnunity-gain-reset opamps, is described. A test chip, realized in an0.35-Μm CMOS process and clocked at 10.24 MHz, provided a dynamicnrange of 80 dB and a signal-to-noise+distortion (SNDR) ratio of 78 dBnfor a 20-kHz signal bandwidth, and a dynamic range of 74 dB and SNDR ofn70 dB for a 50-kHz bandwidth, with a 1-V supply voltage