Low-Power, Low-Cost CMOS Direct-Conversion Receiver Front-End for Multistandard Applications

摘要

A broadband CMOS direct-conversion receiver with on-chip frequency divider has been integrated in a 0.13- $mu$m CMOS process. The key feature of the proposed receiver front-end is a single low-noise transconductance amplifier (LNTA) driving a current-mode passive mixer terminated by a low-input-impedance transimpedance amplifier (TIA). The receiver chain has improved robustness to out-of-band interference and outstanding linearity. We employ a broadband common-gate (CG) LNTA with dual feedback to improve both gain and noise figure (NF) without breaking the fixed relationship between input impedance, transconductance gain, and load impedance. A LNTA load impedance boosting technique suppresses noise-amplification due to TIA, commonly found in passive mixers. The core circuit (RF and baseband signal path) consumes only 13 mW, and the prototype receiver achieves ${>}$ 22.4-dB conversion gain, ${<}hbox{8.3}$ dB NF, and ${geq}-hbox{1.5}$ dBm ${rm IIP}_3$ from 1.4 to 5.2 GHz. Maximum conversion gain of 24.3 dB and minimum NF of 6.5 dB are achieved at 1.4 and 2 GHz, respectively. The chip active area is 1.1 mm$^2$ with the entire RF signal path operated from a 1.2-V supply. The LO portion is biased from a 1.5-V supply.