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A Noise-Shaped VCO-Based Nonuniform Sampling ADC With Phase-Domain Level Crossing

机译:具有相位域电平交叉的基于噪声的基于VCO的非均匀采样ADC

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摘要

This paper introduces a voltage-controlled oscillator (VCO)-based nonuniform sampling (NUS) analog-to-digital converter (ADC), which shifts the conventional voltage-domain level crossing to the phase domain, thus eliminating the need for any continuous-time (CT) comparator or reference generator. It increases the signal bandwidth and reduces the implementation costs of both analog and digital circuitries compared to the existing voltage-domain NUS ADCs. The signal-to-quantization-noise ratio (SQNR) is improved by the first-order noise shaping and inherent dithering via the free-running oscillation of VCO. The quantization error of the proposed architecture is analyzed, and a phase-domain calibration on the VCO nonlinearity is proposed. Due to the mostly digital architecture and time-based nature of the proposed architecture, the performance and figure of merit (FOM) are expected to improve with the scaled technology. This prototype achieves 200-MHz bandwidth with 60-dB dynamic range (DR) and consumes 19.7 mW of power with an active area of 0.13 mm(2) in 65-nm complementary metal-oxide-semiconductor (CMOS), where the nonuniform digital signal processing (DSP) is performed off chip. The estimated power and area of the nonuniform DSP including the calibration and decimation filter are 30 mW and 0.114 mm(2), respectively.
机译:本文介绍了一种基于压控振荡器(VCO)的非均匀采样(NUS)模数转换器(ADC),它将传统的电压域电平交叉点移到了相域,从而消除了任何连续的时间(CT)比较器或参考发生器。与现有的电压域NUS ADC相比,它增加了信号带宽并降低了模拟和数字电路的实施成本。一阶噪声整形和通过VCO的自由振荡产生的固有抖动可改善信噪比(SQNR)。分析了所提出体系结构的量化误差,并提出了对VCO非线性的相位域校准。由于大多数数字体系结构和所提议体系结构的基于时间的性质,因此随着规模化技术的发展,性能和品质因数(FOM)有望得到改善。该原型在65 nm互补金属氧化物半导体(CMOS)中实现了200 MHz带宽和60 dB动态范围(DR),并消耗了19.7 mW的功率,有效面积为0.13 mm(2),其中非均匀数字信号处理(DSP)在芯片外执行。包括校准和抽取滤波器的非均匀DSP的估计功率和面积分别为30 mW和0.114 mm(2)。

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