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Synthesis of verifiable concurrent Java components from formal models

机译:从形式模型综合可验证的并发Java组件

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Concurrent systems are hard to program, and ensuring quality by means of traditional testing techniques is often very hard as errors may not show up easily and reproducing them is hard. In previous work, we have advocated a model-driven approach to the analysis and design of concurrent, safety-critical systems. However, to take full advantage of these techniques, they must be supported by code generation schemes for concrete programming languages. Ideally, this translation should be traceable, automated and should support the verification of the generated code. In our work, we consider the problem of generating a concurrent Java component from a high-level model of inter-process interaction (i.e., communication + synchronization). We call our formalism shared resources. From the model, which can be represented in mathematical notation or written as a Java interface annotated using an extension of JML, a Java component can be obtained by a semiautomatic translation. We describe how to obtain shared memory (using a priority monitors library) and message passing (using the JCSP library) implementations. Focusing on inter-process interaction for formal development is justified by several reasons, e.g., mathematical models are language-independent and allow to analyze certain concurrency issues, such as deadlocks or liveness properties prior to code generation. Also, the Java components produced from the shared resource model will contain all the concurrency-related language constructs, which are often responsible for many of the errors in concurrent software. We follow a realistic approach where the translation is semiautomatic (schemata for code generation) and the programmer still retains the power of coding or modifying parts of the code for the resource. The code thus obtained is JML-annotated Java with proof obligations that help with code traceability and verification of safety and liveness properties. As the code thus obtained is not automatically correct, there is still the need to verify its conformance to the original specs. We illustrate the methodology by developing a concurrent control system and verifying the code obtained using the KeY program verification tool. We also show how KeY can be used to find errors resulting from a wrong use of the templates.
机译:并发系统很难编程,并且通过传统的测试技术来确保质量通常非常困难,因为错误可能不容易显现并且很难再现。在先前的工作中,我们提倡一种模型驱动的方法来分析和设计并发的,对安全至关重要的系统。但是,要充分利用这些技术,必须为具体的编程语言提供代码生成方案来支持它们。理想情况下,这种翻译应该是可追溯的,自动化的,并且应该支持对生成代码的验证。在我们的工作中,我们考虑了从进程间交互(即通信+同步)的高级模型生成并发Java组件的问题。我们将形式主义称为共享资源。从该模型(可以用数学符号表示或使用JML扩展注释的Java接口编写),可以通过半自动翻译获得Java组件。我们描述了如何获取共享内存(使用优先级监视器库)和消息传递(使用JCSP库)实现。出于以下几个原因证明了专注于正式开发的进程间交互是有道理的,例如,数学模型与语言无关,并且可以在生成代码之前分析某些并发问题,例如死锁或活跃性。同样,从共享资源模型产生的Java组件将包含所有与并发相关的语言构造,这些构造通常导致并发软件中的许多错误。我们采用一种现实的方法,其中翻译是半自动的(代码生成方案),而程序员仍然保留了对该资源进行编码或修改部分代码的能力。这样获得的代码是带有JML注释的Java,它具有证明义务,有助于证明代码的可追溯性以及安全性和活动性属性的验证。由于由此获得的代码不是自动正确的,因此仍然需要验证其是否符合原始规格。我们通过开发并发控制系统并验证使用KeY程序验证工具获得的代码来说明该方法。我们还将展示如何使用KeY来查找由于错误使用模板而导致的错误。

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