Performance enhancement in Si/Si_(0.5)Ge_(0.5)/Si strained alloy p-channel metal oxide semiconductor field effect transistors

摘要

Device performance is analysed in p-channel metal-oxide-semiconductor field-effect transistors (MOSFETs), featuring a 6 nm thick, strained Si_(0.5)Ge_(0.5) conduction channel for holes whose thickness exceeds the generally accepted limit for strain relaxation. MOSFETs with gate lengths down to 0.13 μm have been fabricated by an almost standard 0.25 μm CMOS process. Both the saturation drain current and hole mobility are enhanced by factors of up to three in long alloy channel devices, over comparable Si controls, and a current drive enhancement factor of 1.3 is obtained at 0.13 μm.