机译:一种基于集成的新程序,可分别提取MOSFET的串联电阻和迁移率下降
Solid-State Electronics Laboratory, Simon Bolivar University, Caracas 1080, Venezuela;
Solid-State Electronics Laboratory, Simon Bolivar University, Caracas 1080, Venezuela;
Solid-State Electronics Laboratory, Simon Bolivar University, Caracas 1080, Venezuela;
Solid-State Electronics Laboratory, Simon Bolivar University, Caracas 1080, Venezuela;
Solid-State Electronics Laboratory, Simon Bolivar University, Caracas 1080, Venezuela;
Powerchip Semicond. Corp.. Hsinchu Science-Based Industrial Park, Hsinchu, Taiwan,Republic of China;
School of Electrical Engineering and Computer Science. University of Central Florida, Orlando,FL 32816-2450, USA Department of ISEE, Zhejiang University, Hangzhou, People's Republic of China;
机译:提取多指微波MOSFET迁移率退化和串联电阻的直流方法
机译:间接拟合程序可分离MOSFET参数提取中迁移率降低和源漏电阻的影响
机译:提取分离的非线性寄生电阻和MOSFET中有效迁移率的附加电阻方法
机译:提取饱和区中SOI MOSFET的迁移率下降,串联电阻和阈值电压的过程
机译:串联电阻增加对从不同气候的现场老化模块中提取的PV电池填充因子的影响。
机译:GE N沟道MOSFET具有ZrO2电介质实现改进的移动性
机译:串联电阻和迁移率降解参数的表征及薄氧化长通道MOSFET中氧化物厚度的优化选择
机译:估算mOsFET性能串联电阻影响的标准