Drain voltage sweeping-induced degradation in n-type low-temperature polysilicon thin film transistors

摘要

Device degradation under the drain voltage (V_d) sweeping, where V_d lineally sweeps at a fixed gate voltage, has been investigated for n-type low-temperature (LT) polysilicon thin film transistors (TFTs). The degradation mechanism is found to be related to the dc hot carrier (HC) effect even for a sweeping time as short as ～μs. Since a routine device output measurement can induce significant (as large as 30%) on-current (I_(on)) degradation in such LT crystallized TFTs, only by using the optimized pulse IV method can one obtain an accurate output measurement without much affecting the device under test (e.g., ＜0.5% of I_(on) degradation).