SiP: A Test Package for Evaluating a Material Set

摘要

A material set is defined that attains JEDEC Level 3 performance after reflow at 260℃. as required for SiP device manufacture. System-in-package (SiP) devices seem to hold all the aces in the electronics manufacturing world at present. They are popular with electronics designers and assemblers, contributing a valuable saving of real estate on the final assembly - and the marketers like the enhanced functionality that they bring to mobile products.