Hyper-NA Immersion Faces Polarization Challenges

摘要

According to the latest edition of the International Technology Roadmap for Semiconductors (ITRS), released in December, there are essentially four likely solutions for meeting the 32 nm half-pitch: the extension of optical lithography, or the next-generation lithography (NGL) techniques of extreme ultraviolet (EUV), maskless or nanoimprint lithography. For some device makers, the 45 nm node will be achieved simply (or not so simply) with resolution enhancement techniques (RETs). Just at the end of January, for example, Intel announced its demonstration of a fully functional 45 nm SRAM chip with more than a billion transistors. The company says it is on track to deliver 45 nm logic devices in the second half of 2007. And this is all with dry lithography.