Control Strategy for Wafer-Edge Defects

摘要

Identifying and resolving systematic process issues on edge die before they migrate to interior die prevents production yield loss and enables faster yield ramp.rnTraditionally, defect inspection and monitoring are only performed on complete die. Partially printed die at the perimeter of a wafer include only a portion of a full chip, and thus are unusable as product. However, we have determined that inspecting partial die can reveal defect signatures that point to process issues relevant to the full, yielding die. Inspections that include complete wafer information - both full and partial die - provide engineers with a comprehensive picture of a particular process and the associated defectivity.