Enhancement of the EUV irregular-contact resolution & RLS triangle

摘要

The resist used in a lithography process for high-volume manufacturing of integrated circuits is typically optimized to satisfy a number of properties; these include: 1. Being sufficiently stable (mechanical, blur (post-exposure bake (PEB)), dissolution-rates, etc.) to support the lithographic resolution desired at the after development inspection (ADI) stage. 2. Having sufficiently small local variability or line edge roughness (LER) to support the final pattern resolution desired at the after etch inspection (AEI) stage. 3. Having sufficiently small resist-sensilivity (dose) to enable high-throughput. 4. Having sufficiently large etch selectivity of the resist with respect to an underlying hard-mask to allow the pattern to be transferred to a subsequent mask-layer.