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Tricks of High-Speed PCB Stack-Up

机译:高速PCB堆叠的技巧

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Success in electronic hardware development requires skill in managing many tradeoffs. I believe the most effective methods for high-speed PCB stack-up design involve the true collaborative efforts of engineering, design, manufacturing, test and business resources. I have discovered several high-speed stack-up design tips. 1. Avoid adjacent signal routing layers The opportunity for undesired signal coupling and impedance discontinuities is great when circuit conductors are positioned on directly adjacent metal layers within a substrate. Furthermore, at the routing density required by high pin-count VLSI packages, the condition of having two conductors directly shadowing each other on adjacent layers must often be achieved in order to reach 100% connectivity, thus degrading electrical performance.
机译:电子硬件开发的成功需要掌握许多权衡的技巧。我相信,高速PCB叠层设计的最有效方法涉及工程,设计,制造,测试和业务资源的真正协作。我发现了一些高速堆栈设计技巧。 1.避免相邻的信号布线层当电路导体放置在基板内直接相邻的金属层上时,不希望的信号耦合和阻抗不连续的机会就很大。此外,在高引脚数VLSI封装所需的布线密度下,必须经常达到使两个导体在相邻层彼此直接遮蔽的条件,以达到100%的连通性,从而降低电气性能。

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