Small form-factor (sff) mobility products have spurred massive on-chip integration of CPU, graphics, memory, and multiple communication standard interfaces, ranging from wired to wireless onto a single system-on-chip (SoC) package. The printed circuit board assemblies of these products are extremely dense with memory and storage components soldered down, eliminating bulky connectors to fulfill the "thin" features. PCBs for SFF mobility products pose new manufacturing challenges such as package-on-package SMT assembly and limited real estate for test pads. Diminishing accessibility to probe circuit nets for testing, debug and diagnostics requires a test strategy rethink and updated design for test (DfT) guidelines.
展开▼
