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A topology of coupled inductor DC–DC converter with large conversion ratio and reduced voltage stress on semiconductors

机译:具有大转换率的耦合电感器DC-DC转换器的拓扑,以及半导体上的电压应力降低

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摘要

This study presents a high boost DC–DC converter, integrates voltage multiplier cell, voltage lift capacitor, and coupled-inductor techniques to achieve a high-voltage gain. The proposed topology has the capability of extension without utilising any additional winding for a very large voltage conversion ratio. With utilising a passive clamp circuit and without requiring higher duty cycle values, the suggested converter obtains a large conversion ratio, low conduction losses, and reduced voltage stress of semiconductors with a steady value for the whole range of duty cycle. The converter operation principle is discussed and its steady-state operation is analysed in detail. Also, theoretic efficiency calculation and design guidelines of the topology are explained. Then, the proposed DC–DC converter is compared with similar configurations to indicate its advantages. Eventually, the validity of theoretic analysis is verified using experimental measurement results of the implemented prototype with a power rating of 226 W.
机译:本研究介绍了高升压DC-DC转换器,集成了电压乘法器电池,电压提升电容器和耦合电感器技术,以实现高压增益。所提出的拓扑具有扩展的能力,而不利用任何额外的绕组对于非常大的电压转换比。利用被动钳位电路并且不需要更高的占空比值,建议的转换器获得了具有稳定值的半导体的大转换比,低导电损耗和降低的整个占空比。讨论转换器操作原理,并详细分析其稳态操作。此外,解释了拓扑的理论效率计算和设计指导。然后,将所提出的DC-DC转换器与类似的配置进行比较,以表明其优点。最终,使用实施原型的实验测量结果验证了理论分析的有效性,具有226W的额定功率。

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