Low power analog front-end electronics in deep submicrometer CMOS technology based on gain enhancement techniques

摘要

This paper evaluates the design of front-end electronics in modern technologies to be used in a new generation of heavy ion detectors-HYDE (FAIR, Germany)-proposing novel architectures to achieve high gain in a low voltage environment. As conventional topologies of operational amplifiers in modern CMOS processes show limitations in terms of gain, novel approaches must be raised. The work addresses the design using transistors with channel length of no more than double the feature size and a supply voltage as low as 1.2 V. A front-end system has been fabricated in a 90 nm process including gain boosting techniques based on regulated cascode circuits. The analog channel has been optimized to match a detector capacitance of 5 pF and exhibits a good performance in terms of gain, speed, linearity and power consumption.