首页> 外文期刊>Nuclear Instruments & Methods in Physics Research. Section A, Accelerators, Spectrometers, Detectors and Associated Equipment >A data acquisition system for two-dimensional position sensitive micropattern gas detectors with delay-line readout
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A data acquisition system for two-dimensional position sensitive micropattern gas detectors with delay-line readout

机译:具有延迟线读数的二维位置敏感型微模式气体探测器的数据采集系统

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We present a data acquisition (DAQJ system for two-dimensional position sensitive micropattern gas detectors using the delay-line method for readout. The DAQ system consists of a field programmable gate array (FPGA) as the main data processor and our time-to-digital (TDC) mezzanine card for making time measurements. We developed the TDC mezzanine card around the Acam TDC-GPX ASIC and it features four independent stop channels referenced to a common start, a typical timing resolution of ~81 ps, and a 17-bit measurement range, and is compliant with the VITA 57.1 standard. For our DAQ system, we have chosen the Xilinx SP601 development kit which features a single Spartan 6 FPGA, 128 MB of DDR2 memory, and a serial USB interface for communication. Output images consist of 1024 × 1024 square pixels, where each pixel has a 32-bit depth and corresponds to a time difference of 162 ps relative to its neighbours. When configured for a 250 ns acquisition window, the DAQ can resolve periodic event rates up to 1.8 × 10~6 Hz without any loses and will report a maximum event rate of 6.11 × 10~5 Hz for events whose arrival times follow Poisson statistics. The integral and differential non-linearities have also been measured and are better than 0.1% and 1.5%, respectively. Unlike commercial units, our DAQ system implements the delay-line image reconstruction algorithm entirely in hardware and is particularly attractive for its modularity, low cost, ease of integration, excellent linearity, and high throughput rate.
机译:我们提出了一种数据采集(使用延迟线方法进行二维位置敏感型微模式气体探测器的DAQJ系统,该系统由现场可编程门阵列(FPGA)作为主要数据处理器)和用于进行时间测量的数字(TDC)夹层卡我们围绕Acam TDC-GPX ASIC开发了TDC夹层卡,该卡具有四个独立的停止通道,参考一个共同的开始,典型的定时分辨率约为81 ps,并且具有17-位测量范围,并且符合VITA 57.1标准对于我们的DAQ系统,我们选择了Xilinx SP601开发套件,该套件具有单个Spartan 6 FPGA,128 MB DDR2存储器和用于通信的串行USB接口。由1024×1024平方像素组成,其中每个像素的深度为32位,相对于其相邻像素的时间差为162 ps,当配置为250 ns的采集窗口时,DAQ可以解决周期性事件速率高达1.8×10〜6 Hz,没有任何损失,对于到达时间遵循泊松统计的事件,最大事件速率为6.11×10〜5 Hz。还测量了积分非线性和差分非线性,分别优于0.1%和1.5%。与商用单元不同,我们的DAQ系统完全在硬件中实现延迟线图像重建算法,并且其模块化,低成本,易于集成,出色的线性度和高吞吐率特别吸引人。

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