シリーズゲーテイング差動対回路を用いた多値リコンフィギャラブルvlsiに関する研究

摘要

FPGA（Field-Programmable Gate Array）に代表rnされるリコンフィギャラブルプロセッサは，回路構rn成情報を書き換えることにより任意の処理が実現可rn能であるが，性能面ではASICに及ばないという問rn題がある．本稿では，リコンフィギャラブルVLSIrnの高性能化を目的として，シリーズゲーテイング差rn動対回路を用いてコンパクトかつ低電力な2値2変rn数関数実現回路を構成し，その回路をセルのロジッrnクブロックに用いた細粒度多値リコンフィギャラブrnルVLSIを提案する．%This article presents a fine-grain reconfigurable VLSI based on multiple-valued source-coupled logic. In the multiple-valued logic, an arbitrary 2-variable binary function and a full-adder Sum can be realized by programming 4-valued universal literal. A series-gating differential-pair circuit is effectively employed for implementing a compact and low-power universal literal circuit. Therefore, a very simple logic block can be constructed. Moreover, multiple-valued control scheme for bit-serial operation is introduced to reduce interconnection complexity. Differential-pair circuits are also useful for current-output replication, which leads to high-speed signaling to adjacent cells. The area of the proposed cell can be reduced to 78% in comparison with that of an equivalent CMOS cell.