机译:16条路径全无源谐波抑制混频器,具有45nm CMOS SOI中的瓦特级内IIP3
Electrical and Computer Engineering Department University of California at San Diego San Diego CA USA;
Electrical and Computer Engineering Department University of California at San Diego San Diego CA USA;
Electrical and Computer Engineering Department University of California at San Diego San Diego CA USA;
CMOS silicon-on-insulator (SOI); harmonic rejection mixer (HRM); high linearity; passive mixer; wideband receiver;
机译:45 nm CMOS SOI中的无源I / Q毫米波混频器和开关
机译:在45-NM PD-SOI CMOS中使用第二谐波控制的60 GHz 32%PAE-AB PA设计
机译:具有线性抑制功能的后线性化技术,可实现高IIP3和17 GHz CMOS低噪声放大器的图像抑制比
机译:一个0.05–6 GHz电压模式谐波抑制混频器,在32 nm SOI CMOS中具有高达30 dBm的带内IIP3和35 dBc HRR
机译:适用于宽带收发器的cmos 2.4 GHz谐波抑制混频器。
机译:基于电流镜放大器的CMOS谐波抑制混频器