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A complete platform and toolset for system implementation on fine-grain reconfigurable hardware

机译:在细粒度可重配置硬件上用于系统实施的完整平台和工具集

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In this paper a complete system for the implementation of digital logic in a fine-grain reconfigurable platform is introduced. The system is composed of two parts: the fine-grain reconfigurable hardware platform (FPGA) on which the logic is implemented and the set of CAD tools for mapping logic to the FPGA platform. It is the first such complete academic system. The novel energy efficient FPGA architecture was designed and simulated in STM 0.18 μm CMOS technology. The detailed design and circuit characteristics of the Configurable Logic Block as well as the interconnection network are determined and evaluated for energy, delay and area. Concerning the tool flow, each tool can operate as a standalone program as well as part of a complete design framework, composed by existing and new tools.
机译:本文介绍了一个在细粒度可重构平台上实现数字逻辑的完整系统。该系统由两部分组成:在其上实现逻辑的细粒度可重新配置硬件平台(FPGA)和用于将逻辑映射到FPGA平台的CAD工具集。这是第一个完整的学术系统。在STM 0.18μmCMOS技术中设计并仿真了新型节能FPGA架构。确定并评估可配置逻辑模块以及互连网络的详细设计和电路特性,以评估其能量,延迟和面积。关于工具流程,每个工具都可以作为独立程序运行,也可以作为由现有和新工具组成的完整设计框架的一部分。

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