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Compiling Scilab to high performance embedded multicore systems

机译:将Scilab编译为高性能嵌入式多核系统

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摘要

The mapping process of high performance embedded applications to today's multiprocessor system-on-chip devices suffers from a complex toolchain and programming process. The problem is the expression of parallelism with a pure imperative programming language, which is commonly C. This traditional approach limits the mapping, partitioning and the generation of optimized parallel code, and consequently the achievable performance and power consumption of applications from different domains. The Architecture oriented paraLlelization for high performance embedded Multicore systems using scilAb(ALMA)European project aims to bridge these hurdles through the introduction and exploitation of a Sci-lab-based toolchain which enables the efficient mapping of applications on multiprocessor platforms from a high level of abstraction. The holistic solution of the ALMA toolchain allows the complexity of both the application and the architecture to be hidden, which leads to better acceptance, reduced development cost, and shorter time-to-market. Driven by the technology restrictions in chip design, the end of exponential growth of clock speeds and an unavoidable increasing request of computing performance, ALMA is a fundamental step forward in the necessary introduction of novel computing paradigms and methodologies.
机译:高性能嵌入式应用程序到当今多处理器片上系统设备的映射过程要经历复杂的工具链和编程过程。问题在于使用纯命令式编程语言(通常为C)来表示并行性。这种传统方法限制了映射,划分和优化并行代码的生成,因此限制了来自不同领域的应用程序的可实现的性能和功耗。使用scilAb(ALMA)European项目的面向高性能嵌入式多核系统的面向架构的并行化旨在通过引入和利用基于Sci-lab的工具链来弥合这些障碍,该工具链可从更高层次上高效映射多处理器平台上的应用程序抽象。 ALMA工具链的整体解决方案可以隐藏应用程序和体系结构的复杂性,从而提高接受度,降低开发成本并缩短产品上市时间。在芯片设计中的技术限制,时钟速度的指数增长结束和对计算性能的不可避免的增长要求的推动下,ALMA是在必要地引入新颖的计算范式和方法学方面迈出的基本一步。

著录项

  • 来源
    《Microprocessors and microsystems》 |2013年第8ptac期|1033-1049|共17页
  • 作者单位

    Institute for Information Processing Technologies(ITIV), Department of Electrical Engineering, Karlsruhe Institute of Technology(KIT), Germany;

    Institute for Information Processing Technologies(ITIV), Department of Electrical Engineering, Karlsruhe Institute of Technology(KIT), Germany;

    Institute for Information Processing Technologies(ITIV), Department of Electrical Engineering, Karlsruhe Institute of Technology(KIT), Germany;

    Institute for Information Processing Technologies(ITIV), Department of Electrical Engineering, Karlsruhe Institute of Technology(KIT), Germany;

    Recore Systems, The Netherlands;

    Recore Systems, The Netherlands;

    Embedded System Design cation Group, Department of Telecommunication Systems and Networks, Technological Educational Institute of Mesolonghi, Greece;

    Embedded System Design cation Group, Department of Telecommunication Systems and Networks, Technological Educational Institute of Mesolonghi, Greece;

    Embedded System Design cation Group, Department of Telecommunication Systems and Networks, Technological Educational Institute of Mesolonghi, Greece;

    INRIA Research Institute, Universite de Rennes I, France;

    INRIA Research Institute, Universite de Rennes I, France;

    Computer Systems Laboratory, Department of Computer Science and Technology, University of Peloponnese, Greece;

    Computer Systems Laboratory, Department of Computer Science and Technology, University of Peloponnese, Greece;

    Computer Systems Laboratory, Department of Computer Science and Technology, University of Peloponnese, Greece;

    Broadband & Wireless Systems Department Intracom SA. Telecom Solutions, Greece;

    Broadband & Wireless Systems Department Intracom SA. Telecom Solutions, Greece;

    Fraunhofer-Institute of Optronics, System Technologies and Image Exploitation, Germany;

  • 收录信息 美国《科学引文索引》(SCI);美国《工程索引》(EI);
  • 原文格式 PDF
  • 正文语种 eng
  • 中图分类
  • 关键词

    Software toolchain; Multi-processor system-on-chip; Scilab; Compilation; Fine- and coarse-grain parallelization;

    机译:软件工具链;多处理器片上系统;Scilab;汇编;细粒度和粗粒度并行化;

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