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Low-latency X25519 hardware implementation: breaking the 100 microseconds barrier

机译:低延迟X25519硬件实现:突破100微秒的障碍

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摘要

In the past few years, there has been a growing interest in Curve25519 due to its elegant design aimed at both high-security and high-performance, making it one of the most promising candidates to secure IoT applications. Until now Curve25519 hardware implementations were mainly optimized for high throughput applications, while no special care was given to low-latency designs. In this work, we close this gap and provide a Curve25519 hardware design targeting low-latency applications. We present a fast constant-time variable-base-point elliptic curve scalar multiplication using Curve25519 that computes a session key in less than 100 its. This is achieved by using a high-speed prime field multiplier that smartly combines the reduction procedure with the summation of the digit-products. As a result, our presented implementation requires only 10465 cycles for one session key computation. Synthesized on a Zynq-7030 and operating with a clock frequency of 115 MHz this translates to a latency of 92 kts which represents an improvement of factor 3.2 compared to other Curve25519 implementations. Our implementation uses Montgomery ladder as the scalar multiplication algorithm and includes randomized projective coordinates to thwart side-channel attacks. (C) 2017 Elsevier B.V. All rights reserved.
机译:在过去的几年中,Curve25519的优雅设计同时针对高安全性和高性能,引起了人们越来越多的兴趣,使其成为保护物联网应用最有希望的候选者之一。到目前为止,Curve25519硬件实现主要针对高吞吐量应用进行了优化,而低延迟设计则没有特别注意。在这项工作中,我们缩小了差距,并提供了针对低延迟应用程序的Curve25519硬件设计。我们提出了一种使用Curve25519的快速恒定时间可变基点椭圆曲线标量乘法,该乘法计算的会话密钥小于100。这是通过使用高速素数乘法器实现的,该乘法器将归约过程与数字积的总和巧妙地结合在一起。结果,我们提出的实现只需要10465个周期即可进行一次会话密钥计算。在Zynq-7030上合成并以115 MHz的时钟频率工作,这转化为92 kts的等待时间,与其他Curve25519实现相比,代表了3.2倍的改进。我们的实现使用蒙哥马利阶梯作为标量乘法算法,并包括随机投影坐标以阻止边信道攻击。 (C)2017 Elsevier B.V.保留所有权利。

著录项

  • 来源
    《Microprocessors and microsystems》 |2017年第7期|491-497|共7页
  • 作者单位

    Fraunhofer Inst Appl & Integrated Secur AISEC, Munich, Germany;

    Tech Univ Munich, Lehrstuhl Sicherheit Informat Tech, Munich, Germany;

    Fraunhofer Inst Appl & Integrated Secur AISEC, Munich, Germany;

    Fraunhofer Inst Appl & Integrated Secur AISEC, Munich, Germany|Tech Univ Munich, Lehrstuhl Sicherheit Informat Tech, Munich, Germany;

  • 收录信息 美国《科学引文索引》(SCI);美国《工程索引》(EI);
  • 原文格式 PDF
  • 正文语种 eng
  • 中图分类
  • 关键词

    ECC; Curve25519; FPGA; Zynq; ECDH; X25519;

    机译:ECC;Curve25519;FPGA;Zynq;ECDH;X25519;

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