FPGA-based testing system of NAND-memory multi-chip modules

摘要

The article presents a hardware and software system used for functional testing of NAND-memory chips based on FPGA. The system's module structure allows simultaneous testing of up to 144 memory chips. The system performs testing according to the predetermined algorithms and allows controlling time characteristics of NAND-memory integrated circuits. The developed software is used to tune and control the process of testing according to the user's needs, and to analyze the obtained data. Validation is performed using a NAND testing commercial system. The results of testing trial batches of multi-chip NAND-memory modules are presented.