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首页> 外文期刊>Microelectronic Engineering >Study of low temperature MOCVD deposition of TiN barrier layer for copper diffusion in high aspect ratio through silicon vias
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Study of low temperature MOCVD deposition of TiN barrier layer for copper diffusion in high aspect ratio through silicon vias

机译:TiN阻挡层的低温MOCVD沉积用于高纵横比通过硅过孔的铜扩散的研究

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摘要

This article is related to the development of a new low temperature CVD titanium nitride deposition process for the formation of a copper diffusion barrier in 3D TSV integration, using a metalorganic precursor and NH_3. The physicochemical properties of the film are studied on 300 mm silicon wafers deposited using a SPTS Technologies Sigma300 fxP™ deposition equipment. A design of experiments (DoEs) was carried out at 200℃ to check the influence of parameters such as reactor pressure, spacing (distance between the showerhead and the wafer), precursor/NH_3 flow rate during deposition and NH_3 flow rate during a subsequent densification plasma treatment. Responses including resistivity, uniformity, deposition rate and stress were measured. From this DoE, two process points are chosen according to expected material specifications requested from applications: a low resistivity process and a median conditions process. Then microstructure, the composition and stoichiometry of the film deposited with these process points are studied. Finally, the step coverage and continuity of the barrier in a high aspect ratio "through silicon via" (8:1, 10 μm diameter etched in 80 μm silicon) are measured and compared with a reference I-PVD process.
机译:本文涉及一种新的低温CVD氮化钛沉积工艺的开发,该工艺使用金属有机前驱体和NH_3在3D TSV集成中形成铜扩散势垒。在使用SPTS Technologies Sigma300 fxP™沉积设备沉积的300毫米硅晶片上研究了膜的物理化学性质。在200℃下进行了实验设计(DoE),以检查反应器压力,间距(喷头与晶片之间的距离),沉积过程中的前驱物/ NH_3流速以及随后的致密化过程中的NH_3流速等参数的影响。等离子处理。测量了包括电阻率,均匀性,沉积速率和应力在内的响应。从该DOE中,根据应用要求的预期材料规格选择了两个过程点:低电阻率过程和中值条件过程。然后研究了通过这些工艺点沉积的薄膜的微观结构,组成和化学计量。最后,测量高纵横比“直通硅通孔”(8:1,在80μm硅中蚀刻的10μm直径)中的势垒覆盖范围和连续性,并将其与参考I-PVD工艺进行比较。

著录项

  • 来源
    《Microelectronic Engineering 》 |2014年第5期| 127-132| 共6页
  • 作者单位

    CEA, LETI, MINATEC Campus, 17 rue des Martyrs, Grenoble Cedex 9 38054, France,ICube Laboratory (Universite de Strasbourg and CNRS), 23 rue du Loess, B.P. 20, Strasbourg Cedex 2 67037, France;

    CEA, LETI, MINATEC Campus, 17 rue des Martyrs, Grenoble Cedex 9 38054, France;

    CEA, LETI, MINATEC Campus, 17 rue des Martyrs, Grenoble Cedex 9 38054, France;

    SPTS SAS, Inovallee-Bat B 445, rue Lavoisier, Montbonnot 38330, France;

    CEA, LETI, MINATEC Campus, 17 rue des Martyrs, Grenoble Cedex 9 38054, France;

    SPTS, Ring/and Way, Newport, Gwent NP18 2TA, UK;

    SPTS, Ring/and Way, Newport, Gwent NP18 2TA, UK;

    SPTS, Ring/and Way, Newport, Gwent NP18 2TA, UK;

    SPTS, Ring/and Way, Newport, Gwent NP18 2TA, UK;

    ICube Laboratory (Universite de Strasbourg and CNRS), 23 rue du Loess, B.P. 20, Strasbourg Cedex 2 67037, France;

    CEA, LETI, MINATEC Campus, 17 rue des Martyrs, Grenoble Cedex 9 38054, France;

  • 收录信息 美国《科学引文索引》(SCI);美国《工程索引》(EI);美国《生物学医学文摘》(MEDLINE);
  • 原文格式 PDF
  • 正文语种 eng
  • 中图分类
  • 关键词

    Through Silicon via (TSV); Copper diffusion; Barrier; TiN; MOCVD; Step-coverage;

    机译:通过硅通孔(TSV);铜扩散屏障;锡;MOCVD;阶梯覆盖;

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