"Tremendous challenges," "numerous roadblocks," "trashed schedules"―those are just some of the colorful expressions that have been used to describe the difficulty of integrating low-k dielectric materials into IC manufacturing processes. Last spring, after intensive R&D efforts, reams of conference papers, and raging debates between advocates of the spin-on dielectric approach and chemical vapor deposition technology, a host of companies announced that they were beginning volume shipments of chips incorporating low-k Agere Systems, LSI Logic, Motorola, TSMC, Texas Instruments, IBM, and UMC all reported that they were manufacturing―or were on the verge of manufacturing―IC products with low-k dielectrics at the 130-nm and even the 90-nm nodes.
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